Tutorial Day at MASCOTS

Tutorial T1: Morning

Using the NCTUns 2.0
Network Simulator/Emulator to
Facilitate Network Researches

Tutorial T2: Morning

Simulation and
Workload Characterization Techniques for
Efficient Microprocessor Design

Abstract:

The purpose of doing this tutorial is to introduce a new and useful network simulator/emulator – the NCTUns 2.0 (http://NSL.csie.nctu.edu.tw/nctuns.html) to the networking research community. Using a novel simula­tion methodology, the NCTUns 2.0 provides several unique advantages that cannot be easily achieved by traditional network simulators such as ns-2 and OPNET Modeler. This opens up many opportunities for performing network researches and planning in different ways. The NCTUns 2.0 currently can simulate fixed IP Internet, WLAN infrastructure-mode networks, mobile ad-hoc (sensor) networks, GPRS networks, QoS DiffServ networks, and optical networks (including circuit-switching and OBS networks). In addition, it can be easily turned into an emulator so that hosts/routers on real networks can exchange packets with any device in a network simulated by this tool. This feature is very useful for testing the performances of real-world networking devices. Since its release on 11/11/2002, as of 6/21/2004, more than 1,841 people/organizations from 65 countries worldwide have registered and downloaded this tool, and this number is still steadily growing. More and more people are using this tool, which can be evidenced by the many references found by Google.

Outline of Tutorial Content:

1.  The concept, architecture, design, and implementation of the NCTUns 2.0

2.  The NCTUns 2.0 GUI operation guide

3.  The NCTUns 2.0 protocol module developer guide

4.  Fifteen demo cases covering various networks and protocols.

Shie-Yuan Wang

Dept. of Computer Science and Information Engineering

National Chiao Tung University, Taiwan

shieyuan@csie.nctu.edu.tw

Abstract:

Designing a high performance microprocessor is ex­tremely time consuming taking at least several years! An important part of this design effort is architectural simulation which defines the microarchitecture or the organization of the microprocessor! The reason why these simulations are so time consuming is fourfold: (1) the architectural design space is huge, (2) the number of benchmarks the microarchitecture needs to be evaluated with is large, (3) the number of instructions that need to be simulated per benchmark is huge as well, and (4) simulators are becoming relatively slower due to the increasingly complex designs of current high perform­ance microprocessors. In this tutorial, we will discuss these issues and propose a solution for each of them. As such, we will present an architectural simulation frame­work for designing high performance microprocessors that reduces the total simulation time by several orders of magnitude without sacrificing accuracy. This is done by combining several recently proposed techniques, such as statistical simulation, representative workload design using statistical data analysis techniques, sam­pling and reduced input sets.

The tutorial will cover recent advances in computer architecture modeling and simulation, and workload characterization and genera­tion. It will address tech­niques related to per­formance analysis and validation, benchmarking, and measurement. In addition, the tutorial will introduce recently developed techniques that are relatively unknown to the MASCOTS commun­ity, although these techniques are being recognized as increasingly important in the computer architecture com­mu­nity. By addressing these research topics in a tutorial and not a workshop, it is possible to present an overview of all existing tech­niques in this area from a holistic point of view.

Lieven Eeckhout

Department of Electronics and Information Systems

Ghent University, Belgium

leeckhou@elis.ugent.be

http://www.elis.ugent.be/~leekhou

Tutorial T3: Afternoon

Modeling of Discrete-Time
Communication Systems

Tutorial T4: Afternoon

Aspect Oriented Technology in
System Performance Measurement, Analysis and Improvement.

Abstract:

In digital communication systems, buffers are used for the temporary storage of units of information (packets, cells, messages, etc.) that cannot be immediately trans­mitted. Thus, buffers appear in multiplexers, switches, rate adapters, traffic shapers, etc. In various scenarios, the units of information are fixed-length packets (cells, messages, etc.) that are transmitted at regular points in time, thus constituting a discrete-time arrival process. These scenarios can be found in communication systems such as ATM, wireless and optical networks. The tuto­rial will provide a global view of the concepts, methods and tools arising in the field of performance evaluation of discrete-time communication systems, where the transfer of infor­mation is based on fixed-length packets, and whose transmission can begin (and end) only at slot boundaries. Moreover, the purpose is to present all related issues in such a way that reflects the historical evolution, state of the art and future perspectives of the field. For the benefit of a major comprehensive­ness, the presentation will progress on the borderline between pure scientific spreading and mathematical rigor; thus, gen­eral methods and results will predominate over formal details. Special attention will be paid to analytical meth­ods, despite numerical and simulation tools will also be referred to. The discussion will be complemented with the authors’ research contributions, which are globally focused on the definition of a general paradigm for the analytical treatment of performance evaluation problems in the area of discrete-time communication systems. Finally, practical application examples and suggestions for further research will be provided.

Objectives:

Provide a global view of the history and state of the art in discrete-time queuing theory. Describe tools and methodologies typically used in discrete-time queuing theory. Discuss analytical, numerical, and simulation tools. Describe current simulation packages. Illustrate the application of discrete-time queuing theory to different motivating scenarios. Emphasize further challenges in the area.

Ramon Puigjaner

Department of Mathematics and Computer Science

Universitat de les Illes Balears

Palma de Mallorca, Spain

putxi@uib.es

Sebastià Galmés

Department of Mathematics and Computer Science

Universitat de les Illes Balears

Palma de Mallorca, Spain

sebastia.galmes@uib.es

Abstract:

Aspect Oriented Software Development addresses the creation and use of technologies to aid in the identification and exploitation of a particular type of software modularity. A simple motivating example is to examine a traditional implementation of logging in a complex software stack (e.g., Apache Tomcat). Logging logic and policy is scattered all throughout the source. The problem is that the policy has been lost, and is probably not uniformly applied. AO allows for the identification of such cross-cutting concerns (or aspects), and deals explicitly with such concepts that cannot be completely captured through more traditional OO techniques such as inheritance. Aspect Oriented technologies such as AspectJ are now quite robust, and have been well integrated into common development environments (e.g., Eclipse). This has greatly enhanced their availability to, and adoption by, developers. However, the awareness and use of AO techniques in the performance discipline is still quite low. This tutorial introduces AO to the performance community as an important technology that can simplify many facets of the performance engineering discipline, including design; instrumentation and measurement; analysis and diagnosis; exploring and introducing performance improvement; and also for introducing performance management capability. A particularly compelling application is in the area of flexible and dynamic performance profiling.

Objectives

To introduce attendees to AOSD concepts and technol­ogy, and to the opportunities for applying AOSD technologies across a broad range of activities within the performance engineering discipline. To provide motiva­tion through example and discussion that AO can add significant value to performance engineering.

Paul Kelly

Department of Computing

Imperial College of Science, Technology and Medicine

p.kelly@doc.ic.ac.uk

http://www.doc.ic.ac.uk/~phjk

Robert Berry

IBM Corporation

Hursley Park, Hursley, Winchester, SO21 2JN

brobert@uk.ibm.com